This invention relates to methods and apparatus for increasing the speed with which computers calculate values for complex formulas.
As microcomputers have become less expensive and more commonplace, the availability and complexity of microcomputer software has steadily increased, placing increased speed and functionality demands on microcomputer hardware. For example, contemporary data-management software allows the user to perform data retrieval and storage operations on very large files of data. This type of operation can strain the input/output capabilities of the microcomputer, and unless the software and the microprocessor hardware are carefully optimized for speed, such operations can be unacceptably slow. Furthermore, contemporary software for performing mathematical operations (e.g., spreadsheet software, which can be used for various financial or other mathematical analyses), requires the computer to not only perform data retrieval/storage operations, but may also require the microcomputer to repeatedly recalculate complex formulas. (A "formula", as the term is used here and in the following description, is a mathematical, logical, or string operation, or ordered sequence of such operations, which acts on one or more arguments to produce a result.) This type of software can strain not only the input/output functions of the computer, but also the computational power of the computer, and therefore can be even more drastically affected by less than optimal software or hardware design.
Traditional microcomputer designs are not well suited to these types of complex operations. In traditional designs, a single device, known as a general purpose microprocessor (typically a single computer chip), controls all input/output functions and also performs all computational functions. The microprocessor includes communications and timing circuitry which controls the operations of storage and interface components in the remainder of the microcomputer, and also includes circuitry which is responsible for performing computational tasks such as mathematical or logical operations. The difficulty with this traditional design is that, due to the wide variety of functions performed by the microprocessor, and cost and chip area limitations, the microprocessor design cannot be completely optimized for all of the functions it must perform.
In response to increasing pressure for performance, microcomputer hardware designers have modified the traditional microcomputer in several ways. Several techniques, some of which are discussed below, have been used to enhance performance. Often these techniques are combined for further performance enhancement.
One technique is to redesign the microprocessor circuitry to operate at greater speeds. This technique has the advantage that the microprocessor architecture remains unchanged, and thus existing software need not be rewritten to take advantage of the speed enhancement. However, unlike the other techniques described below, this technique does not optimize the microprocessor's architecture.
A second technique is to optimize the microprocessor architecture to increase the speed of some of the more common operations, e.g., the microprocessor may be designed to perform multi-step operations in fewer steps. This technique retains the cost advantages of a single-chip processor, but the optimizations typically increase the complexity of the microprocessor chip, and thus the amount of optimization that can be achieved is limited by the chip area. As a result, the speed of many operations may not be affected.
The above two techniques are illustrated by the instruction sets and relative speed of the "80*86" (8086, 80186, 80286 and 80386) family of microprocessor chips, which are successively faster versions of the traditional microprocessor design, and are described in various literature available from Intel.RTM. Corporation, Literature Distribution, Mail Stop SC6-59, 3065 Bowers Avenue, Santa Clara, Calif. 95051.
A third technique for increasing microprocessor speed couples the microprocessor to an additional computational engine, known as a coprocessor, which is carefully optimized to perform particular functions rapidly. Typically, the co-processor is designed to perform complex mathematical computations, such as multiplication and exponentiation, in an optimized fashion. The microprocessor is designed with a high-speed coprocessor interface (separate from the other interfaces of the microprocessor) so that it may quickly refer complex mathematical operations to the coprocessor rather than computing them with the microprocessor's own, less optimal, internal computation circuitry. The results generated by the coprocessor are then returned to the microprocessor through the coprocessor interface and used in subsequent computation, which may include further coprocessor operations. Coprocessor techniques are illustrated by the 80387 Numeric Processor Extension chip, which is designed for use with the 80386 microprocessor, and is described in data sheets and other literature available from Intel.RTM. Corporation at the address provided above.
Another, less-explored technique for increasing processing speed involves redesigning the microcomputer with multiple independent microprocessors, and designing software that allows the microprocessors to perform computations or input/output functions simultaneously and in parallel. However, cost and space requirements, as well as the compatibility of currently available software, have thus far limited the use of this last technique.